|
|
#define | REG_PIDH 0x300A |
|
#define | REG_PIDL 0x300B |
|
#define | SYSTEM_CTROL0 0x3008 |
|
#define | DRIVE_CAPABILITY 0x302c |
|
#define | SC_PLL_CTRL0 0x3034 |
|
#define | SC_PLL_CTRL1 0x3035 |
|
#define | SC_PLL_CTRL2 0x3036 |
|
#define | SC_PLL_CTRL3 0x3037 |
|
#define | SC_PLL_BYPASS 0x3039 |
|
#define | SC_PLL_CLK_SEL 0x3103 |
|
#define | PCLK_PERIOD 0x3108 |
|
#define | SC_PLLS_CTRL0 0x303a |
|
#define | SC_PLLS_CTRL1 0x303b |
|
#define | SC_PLLS_CTRL2 0x303c |
|
#define | SC_PLLS_CTRL3 0x303d |
|
#define | AEC_PK_MANUAL 0x3503 |
|
#define | X_ADDR_ST_H 0x3800 |
|
#define | X_ADDR_ST_L 0x3801 |
|
#define | Y_ADDR_ST_H 0x3802 |
|
#define | Y_ADDR_ST_L 0x3803 |
|
#define | X_ADDR_END_H 0x3804 |
|
#define | X_ADDR_END_L 0x3805 |
|
#define | Y_ADDR_END_H 0x3806 |
|
#define | Y_ADDR_END_L 0x3807 |
|
#define | X_OUTPUT_SIZE_H 0x3808 |
|
#define | X_OUTPUT_SIZE_L 0x3809 |
|
#define | Y_OUTPUT_SIZE_H 0x380a |
|
#define | Y_OUTPUT_SIZE_L 0x380b |
|
#define | X_TOTAL_SIZE_H 0x380c |
|
#define | X_TOTAL_SIZE_L 0x380d |
|
#define | Y_TOTAL_SIZE_H 0x380e |
|
#define | Y_TOTAL_SIZE_L 0x380f |
|
#define | X_OFFSET_H 0x3810 |
|
#define | X_OFFSET_L 0x3811 |
|
#define | Y_OFFSET_H 0x3812 |
|
#define | Y_OFFSET_L 0x3813 |
|
#define | X_INCREMENT 0x3814 |
|
#define | Y_INCREMENT 0x3815 |
|
#define | TIMING_TC_REG20 0x3820 |
|
#define | TIMING_TC_REG21 0x3821 |
|
#define | PCLK_RATIO 0x3824 |
|
#define | FRAME_CTRL01 0x4201 |
|
#define | FRAME_CTRL02 0x4202 |
|
#define | FORMAT_CTRL00 0x4300 |
|
#define | CLOCK_POL_CONTROL 0x4740 |
|
#define | ISP_CONTROL_01 0x5001 |
|
#define | FORMAT_CTRL 0x501F |
|
#define | PRE_ISP_TEST_SETTING_1 0x503D |
|
#define | SCALE_CTRL_1 0x5601 |
|
#define | SCALE_CTRL_2 0x5602 |
|
#define | SCALE_CTRL_3 0x5603 |
|
#define | SCALE_CTRL_4 0x5604 |
|
#define | SCALE_CTRL_5 0x5605 |
|
#define | SCALE_CTRL_6 0x5606 |
|
#define | VFIFO_CTRL0C 0x460C |
|
#define | VFIFO_X_SIZE_H 0x4602 |
|
#define | VFIFO_X_SIZE_L 0x4603 |
|
#define | VFIFO_Y_SIZE_H 0x4604 |
|
#define | VFIFO_Y_SIZE_L 0x4605 |
|
#define | COMPRESSION_CTRL00 0x4400 |
|
#define | COMPRESSION_CTRL01 0x4401 |
|
#define | COMPRESSION_CTRL02 0x4402 |
|
#define | COMPRESSION_CTRL03 0x4403 |
|
#define | COMPRESSION_CTRL04 0x4404 |
|
#define | COMPRESSION_CTRL05 0x4405 |
|
#define | COMPRESSION_CTRL06 0x4406 |
|
#define | COMPRESSION_CTRL07 0x4407 |
|
#define | COMPRESSION_ISI_CTRL 0x4408 |
|
#define | COMPRESSION_CTRL09 0x4409 |
|
#define | COMPRESSION_CTRL0a 0x440a |
|
#define | COMPRESSION_CTRL0b 0x440b |
|
#define | COMPRESSION_CTRL0c 0x440c |
|
#define | COMPRESSION_CTRL0d 0x440d |
|
#define | COMPRESSION_CTRL0E 0x440e |
|
#define | TEST_COLOR_BAR 0xC0 |
| | register value
|
|
#define | AEC_PK_MANUAL_AGC_MANUALEN 0x02 |
|
#define | AEC_PK_MANUAL_AEC_MANUALEN 0x01 |
|
#define | TIMING_TC_REG20_VFLIP 0x06 |
|
#define | TIMING_TC_REG21_HMIRROR 0x06 |
OV5640 register definitions (16-bit addresses).
Ported verbatim from esp32-camera's sensors/private_include/ov5640_regs.h, with the PID and PLL registers (0x3034-0x3039, 0x3108) used by set_pll given names.